Phase 2 Interactive Simulator
Latency Numbers Visualizer ⏱️
Scale nanosecond hardware delays into intuitive human time (1 CPU cycle = 1 second).
1 CPU Clock Cycle (3.3 GHz)
The fundamental heartbeat of modern silicon processors executing a single instruction.
1 Second
If fetching from CPU register takes 1 second, this operation feels like waiting 1 Second to the processor!
💡 Architectural Insight:
Reading from RAM is like a 5-minute coffee break; reading from spinning disk is waiting 10 months; cross-ocean network calls are a 16-year career!
Computing Fundamentals
High-scale distributed systems are built on top of single-node computing primitives.
All Topics in Phase 2
0 of 12 completedExplore the trade-offs between speed, cost, and capacity across CPU registers, L1/L2/L3 caches, Main Memory (DRAM), NVMe SSDs, and Magnetic Hard Drives.
Master the iconic back-of-the-envelope latency benchmarks compiled by Jeff Dean: Scale hardware nanoseconds into human intuitive time scales.
Differentiate isolated memory address spaces from shared-memory lightweight execution units: Virtual memory, IPC, stack vs heap, and crash isolation.
Disentangle structure from execution: Rob Pike's composition model, time slicing on single cores vs simultaneous execution across multi-core CPUs.
Understand the hidden CPU tax of multitasking: Register saving, kernel transitions, TLB (Translation Lookaside Buffer) flushes, and cache line invalidation.
Write correct concurrent programs: Shared mutable state, memory models, volatile variables, atomic operations, and lock-free programming.
Master synchronization primitives: Mutex (Mutual Exclusion), Counting Semaphores (Rate limiting), Read-Write Locks (RWLock), and Spinlocks (Busy-waiting).
Analyze concurrency bugs: Coffman's 4 deadlock conditions, lock hierarchy ordering, bank transfer deadlocks, and distributed deadlocks across microservices.
Explore the 5 I/O models: Synchronous Blocking, Synchronous Non-Blocking, I/O Multiplexing (select/poll/epoll), Signal-Driven I/O, and Asynchronous I/O (io_uring).
Deconstruct event loop mechanics: Call stack, Microtask queue, Macrotask queue, libuv, backpressure, and why CPU-bound tasks block the event loop.
Understand how operating systems store and cache data: Inodes, OS Page Cache, write-back flushing (fsync), direct I/O, and Write-Ahead Logging (WAL).